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Advanced Power MOSFET FEATURES s Avalanche Rugged Technology s Rugged Gate Oxide Technology s Lower Input Capacitance s Improved Gate Charge s Extended Safe Operating Area s Lower Leakage Current : 10 A (Max.) @ VDS = 250V s Lower RDS(ON) : 0.214 (Typ.) IRFS644A BVDSS = 250 V RDS(on) = 0.28 ID = 7.9 A TO-220F 1 2 3 1.Gate 2. Drain 3. Source Absolute Maximum Ratings Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD TJ , TSTG TL Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25) Continuous Drain Current (TC=100) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC=25) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8? from case for 5-seconds Value 250 7.9 5 56 30 390 7.9 4.3 4.8 43 0.35 - 55 to +150 Units V A A V mJ A mJ V/ns W W/ 300 Thermal Resistance Symbol RJC RJA Characteristic Junction-to-Case Junction-to-Ambient Typ. --Max. 2.89 62.5 Units /W IRFS644A Electrical Characteristics (TC=25 unless otherwise specified) Symbol BVDSS BV/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain(iller? Charge Min. Typ. Max. Units 250 -2.0 -----------------0.28 ------6.85 180 80 17 17 74 32 46 9.3 19.5 --4.0 100 -100 10 100 0.28 -210 95 50 50 160 80 61 --nC ns A V V/ V nA N-CHANNEL POWER MOSFET Test Condition VGS=0V,ID=250A ID=250A VGS=30V VGS=-30V VDS=250V VDS=200V,TC=125 VGS=10V,ID=3.95A VDS=40V,ID=3.95A See Fig 7 VDS=5V,ID=250A 1230 1600 pF VGS=0V,VDS=25V,f =1MHz See Fig 5 VDD=125V,ID=14A, RG=9.1 See Fig 13 VDS=200V,VGS=10V, ID=14A See Fig 6 & Fig 12 Source-Drain Diode Ratings and Characteristics Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Min. Typ. Max. Units --------215 1.59 7.9 56 1.5 --A V ns C Test Condition Integral reverse pn-diode in the MOSFET TJ=25,IS=7.9A,VGS=0V TJ=25,IF=14A diF/dt=100A/s Notes ; Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature L=10mH, IAS=7.9A, VDD=50V, RG=27, Starting TJ =25 ISD14A, di/dt250A/s, VDDBVDSS , Starting TJ =25 Pulse Test : Pulse Width = 250s, Duty Cycle 2% Essentially Independent of Operating Temperature N-CHANNEL POWER MOSFET Fig 1. Output Characteristics VGS Top : 15V 10 V 8.0 V 7.0 V 6.0 V 5.5V 5.0 V Bottom : 4.5V IRFS644A Fig 2. Transfer Characteristics ID , Drain Current [A] ID , Drain Current [A] 11 0 11 0 10 0 10 0 1 0 oC 5 2 oC 5 @Nts: oe 1 V =0V . GS 2 V =4 V . DS 0 us et 3 2 0 s P l e T s .5 6 8 1 0 @Nts: oe 1 2 0 s P l e T s .5 us et 2 T = 2 oC .C 5 1 0 -1 - 5 oC 5 11 0 1 0 -1 1 -1 0 10 0 2 4 VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V] Fig 3. On-Resistance vs. Drain Current 08 . Fig 4. Source-Drain Diode Forward Voltage IDR , Reverse Drain Current [A] RDS(on) , [ ] Drain-Source On-Resistance 06 . V =1 V 0 GS 11 0 04 . 10 0 @Nts: oe 1 V =0V . GS us et 2 2 0 s P l e T s .5 08 . 10 . 12 . 14 . 16 . 18 . 02 . V =2 V 0 GS o 1 0 oC 5 2 oC 5 1 -1 0 02 . 04 . 06 . @Nt :T =2 C oe J 5 00 . 0 1 5 3 0 4 5 6 0 ID , Drain Current [A] VSD , Source-Drain Voltage [V] Fig 5. Capacitance vs. Drain-Source Voltage 20 00 C =C +C (C =sotd) iss gs gd ds h r e C =C +C oss ds gd C =C rss gd Fig 6. Gate Charge vs. Gate-Source Voltage 1 0 V =5 V 0 DS V =15V 2 DS V =20V 0 DS 10 50 10 00 C oss 50 0 C rss @Nts: oe 1 V =0V . GS 2 f=1Mz . H VGS , Gate-Source Voltage [V] C iss Capacitance [pF] 5 @Nts:I =1. A oe 40 D 0 0 1 0 2 0 3 0 4 0 5 0 00 1 0 11 0 VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC] IRFS644A Fig 7. Breakdown Voltage vs. Temperature 12 . 30 . N-CHANNEL POWER MOSFET Fig 8. On-Resistance vs. Temperature BVDSS , (Normalized) Drain-Source Breakdown Voltage 11 . RDS(on) , (Normalized) Drain-Source On-Resistance 25 . 20 . 10 . 15 . 10 . @Nts: oe 1 V =1 V . GS 0 2 I =70A .D . -0 5 -5 2 0 2 5 5 0 7 5 10 0 15 2 10 5 15 7 09 . @Nts: oe 1 V =0V . GS 2 I = 2 0 A .D 5 -0 5 -5 2 0 2 5 5 0 7 5 10 0 15 2 10 5 15 7 05 . 08 . -5 7 00 . -5 7 TJ , Junction Temperature [oC] TJ , Junction Temperature [oC] Fig 9. Max. Safe Operating Area Oeaini Ti Ae prto n hs ra i L m t d b R DS(on) s iie y Fig 10. Max. Drain Current vs. Case Temperature 8 ID , Drain Current [A] ID , Drain Current [A] 12 0 1 s 0 1 0 s 0 1m s 11 0 1m 0s 10m 0s D C 10 0 @Nts: oe 1 T = 2 oC .C 5 2 T =10 C .J 5 3 Snl Ple . ige us 1 0 -1 o 6 4 2 10 0 11 0 12 0 0 2 5 5 0 7 5 10 0 15 2 10 5 VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC] Fig 11. Thermal Response Thermal Response D=0.5 100 0.2 0.1 0.05 10- 1 0.02 0.01 single pulse 10 -2 @ Notes : 1. Z J C (t)=2.89 o C/W Max. 2. Duty Factor, D=t1 /t2 3. TJ M -TC =PD M *Z J C (t) PDM t1 t2 Z (t) , JC 10- 5 10- 4 10- 3 10- 2 10- 1 100 101 t1 , Square Wave Pulse Duration [sec] N-CHANNEL POWER MOSFET Fig 12. Gate Charge Test Circuit & Waveform IRFS644A Current Regulator 50K 12V 200nF 300nF Same Type as DUT VGS Qg 10V VDS VGS DUT 3mA Qgs Qgd R1 Current Sampling (IG) Resistor R2 Current Sampling (ID) Resistor Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL Vout Vin RG DUT Vin 10V td(on) t on tr td(off) t off tf 10% Vout VDD ( 0.5 rated VDS ) 90% Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms LL VDS Vary tp to obtain required peak ID BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD BVDSS IAS C VDD VDD tp ID RG DUT 10V tp ID (t) VDS (t) Time IRFS644A Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms N-CHANNEL POWER MOSFET DUT + VDS -- IS L Driver RG VGS Same Type as DUT VGS VDD * dv/dt controlled by G * IS controlled by Duty Factor ? VGS ( Driver ) Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) IRM di/dt Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt Vf VDD Body Diode Forward Voltage Drop TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM DISCLAIMER FAST FASTrTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MICROWIRETM OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM PowerTrench QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER SMART STARTTM Star* PowerTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM UHCTM UltraFET VCXTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H1 |
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